Technical Field
The present invention relates to the field of production technologies of a light emitting diode, and in particular, to production technologies of a light emitting diode chip.
Related Art
With the advancement of epitaxial technologies, brightness of a semiconductor light emitting diode is improved year by year. According to power, a chip may be divided into a large-power chip, a medium-power chip, and a small-power chip. Large power means a large-size chip. However, 5 years before, large-size and large-power brightness now has been replaced with the medium-size chip, which has lower costs. Accordingly, the medium-power chip having a medium size in the past may be replaced with an existing small-size chip. In addition, a Nitride semiconductor used to generate an epitaxial layer is not a perfect crystal. In a generation process, because generation conditions between layers are different, crystal mismatch causes defects, where the defect density is about 109 cm−2 to 1010 cm−2. Even through a PSS substrate has been used in the prior art, there is still a defect density above 105 cm−2. Therefore, a chip having a larger size is easily affected by the defect density, which results in that the reliability of a chip is lowered, and a passing rate is lower relative to the small-size chip. Therefore, for upstream chip manufacturing, the medium and small-sized chips have higher utilization than an epitaxial chip.
However, because the medium and small-sized chips have less light emitting areas, the medium and small-sized chips also greatly affect use of the small-sized chips for higher brightness. In the prior art, two wire bonding pads, as an external positive electrode and an external negative electrode, are located on a surface of a chip. A size of a pad is equivalent to an area of a circle having a diameter of 70 to 100 um. In the prior art, a light emitting area of an N pad area is etched to make an N pad. As the size of a chip is reduced, an effect caused by loss of a chip light emitting area of a pad is more obvious. For example, a typical 10 mil×23 mil chip, an area of a pad approximately accounts for 10% of an area of an entire chip.
In addition, an existing pad is generated on a flat and smooth plane and has bad adhesion, which results in that a chip pulls off a pad and is sealed off after suffering the hot-cold alternative temperature within an encapsulation body.